The present invention relates to electromagnetic emissions, and more specifically to a circuit and method for minimizing electromagnetic emissions.
Electromagnetic Compatibility (EMC) is an important phase of releasing any high-speed digitally-clocked products. Passing EMC tests of the FCC, CISPR, and other regulatory agencies usually dictates a significant portion of the digital design, as well as the circuit board layout. Most engineers will confess that EMC is difficult and costly to achieve.
Known methods for achieving EMC involve adding shielding components, or they may even involve totally redesigning the circuit.
Conventional oscillators used to clock digital chips have four pins, three of which are used. One of the three used outputs provides the clock signal as well as harmonic frequencies. Any one of these frequencies may cause problems with EMC, as the printed circuit board traces act as antennae for radiating the frequencies.
Therefore, it would be desirable to provide a circuit and method for minimizing electromagnetic emissions in digital products.